The present invention generally relates to a method of producing a dynamic random access memory device, and more particularly to a method of producing a layer structure of a memory cell for a dynamic random access memory device.
As is well known, a memory cell used in a dynamic random access memory device (hereinafter simply referred to as a DRAM device) is composed of a memory cell capacitor (or a stacked capacitor) and a transfer transistor. In order to reduce the size of a DRAM device, it is necessary to reduce length and width of the memory cell, or an area of the memory cell which occupies a semiconductor substrate. In a case where an area defined by length and width of the memory cell is equal to or less than 10 [.mu.m.sup.2 ], it becomes impossible to obtain a memory cell capacitor having sufficient capacitance.
In order to increase capacitance of the memory capacitor without increasing the area which occupies the semiconductor substrate, an improved structure of the memory cell capacitor has been proposed in the Japanese Laid-Open Patent Application No. 62-48062. The disclosed improved structure has a memory cell capacitor in which a storage capacitor consists of a plate-shaped film and a vertical projection film, which are made of polysilicon. The plate-shaped film and vertical projection film are formed on an interlayer insulation film. The vertical projection film is in contact with a side wall of the plate-shaped film, and projects over an upper surface of the plate-shaped film. With the vertical projection film, it is possible to increase the capacitance of the memory cell capacitor.
However, the disclosed improvement has disadvantages described below. As described in the above document, the vertical projection film is formed by etching a polysilicon film deposited so as to cover a patterned silicon dioxide film which is formed on the plate-shaped film formed on the interlayer insulation film. In the etching, an upper portion of the deposited polysilicon film in the vicinity of a top surface of the patterned silicon dioxide film is liable to be greatly etched (over-etching), compared with a lower portion of the deposited polysilicon film. As a result, it is very difficult to obtain a predetermined height of the vertical film. Therefore, values of capacitance of memory cell capacitors are not identical to each other.
Normally, the interlayer insulation film on which the plate-shaped and vertical projection films are formed, has recess and convex surface portions due to the presence of gate electrodes. Therefore, it is very difficult to form the vertical projection film on the recess and convex surface portions of the interlayer insulation film with high controllability.
The aforementioned patterned silicon dioxide film is removed by isotropic etching in which a gas of HF is used. As a result, the interlayer insulation film on which the plate-shaped and vertical projection films are formed, must be made of silicon nitride (Si.sub.3 N.sub.4).